With the rapid development of wireless communication systems, wireless communication apparatuses become more and more complicated and miniaturized. Digital signal processing techniques have inherent advantages in a complex mathematical operation, such as flexible mathematical transformation, strong computing capability, ease for implementation and the like. On the other hand, many functions can be integrated in an integrated chip by using digital signal processing techniques, so as to reduce size of apparatuses. Thus, the trend for wireless communication systems is to implement more functions by using digital signal processing techniques instead of analog signal processing techniques.
RF sampling is an important research subject in various schemes in which digital signal processing techniques are used in RF domain. In traditional Heterodyne receivers, zero IF receivers and low IF receivers, sampling and quantization are generally completed in baseband or low IF band, and thus many functions must be completed in analog domain. On the contrary, RF sampling is sampling RF signals before down conversion, such that a continuous-amplitude and continuous-time RF signal is transformed into a continuous-amplitude and discrete-time signal. RF sampling has several advantages. First, more functions can be implemented by using digital signal processing techniques; Second, more functions can be integrated in an integrated chip so as to employ more and more advanced integrated chip processing techniques; Third, the functions completed after RF sampling and prior to a digital signal process unit, such as down-converting, subsampling, filtering, analog-digital converting and the like, can be implemented by using discrete-time signal processing techniques. In general, processing discrete-time signal is much easier than processing continuous-time signal.
Texas Instruments proposes a receiver architecture with RF sampling on the proceeding of IEEE Solid State Circuit, 2004. To facilitate description, FIG. 1 is a simplified diagram showing this receiver architecture. In a receiver 100, a RF signal S110 is transferred to a RF bandpass filter (BPF) 120 to generate a bandpass-filtered RF signal. The bandpass-filtered RF signal S122 is amplified by a LNA (Low Noise Amplifier) to improve signal to noise ratio. The bandpass-filtered RF signal S122 is sampled by a sampling unit 150 and transformed into a discrete analog signal S152. Thereafter, a discrete filter 160 and an analog-digital converter 170 transform the discrete analog signal into a digital signal S172 for being processed by a subsequent digital receiving link unit 180.
In FIG. 1, the sampling is completed in RF band. However, such a method has a drawback, i.e., the sampling rate is too high. For example, the sampling rate is about 2400 MHz for Bluetooth and WLAN device. In general, the higher the sampling rate, the higher the power dissipation, and the more complicated the design of a sampling unit. Therefore, it is necessary to solve the problem that the sampling rate is too high.
A way of solving this problem is to employ a high-performance RF bandpass filter BPF whose bandwidth is approximate to the band of a modulated signal. However, this RF bandpass filter BPF is generally bulky and costly, and it is also difficult to achieve a BPF with a narrow bandwidth. Thus, it is difficult to use such a BPF in mobile equipment, particularly in a hand-held device. In a practical system, it is difficult to form a BPF whose bandwidth is very narrow and accurate by connecting a plurality of wide-bandwidth BPF in series due to the limitation of performance, size, and power dissipation.
Therefore, it is necessary to solve the problem that RF sampling rate is too high in a simple and easy way.